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LE25S40MB
Description of Commands and Their Operations
A detailed description of the functions and operations corresponding to each command is presented below.
1. Standard SPI read
There are two read commands, the standard SPI read command and High-speed read command.
1-1. Read command
Consisting of the first through fourth bus cycles, the 4 bus cycle read command inputs the 24-bit addresses following
(03h). The data is output from SO on the falling clock edge of fourth bus cycle bit 0 as a reference. "Figure 4-a Read"
shows the timing waveforms.
Figure 4-a Read
CS
Mode3
0 1 2 3 4 5 6 7 8
15 16
23 24
31 32
39 40
47
SCK
Mode0
8CLK
SI
03h
Add.
Add.
Add.
N
N+1
N+2
SO
High Impedance
DATA
MSB
DATA
MSB
DATA
MSB
1-2. High-speed Read command
Consisting of the first through fifth bus cycles, the High-speed read command inputs the 24-bit addresses and 8 dummy
bits following (0Bh). The data is output from SO using the falling clock edge of fifth bus cycle bit 0 as a reference.
"Figure 4-b High-speed Read" shows the timing waveforms.
Figure 4-b High-speed Read
CS
Mode3
0 1 2 3 4 5 6 7 8
15 16
23 24
31 32
39 40
47 48
55
SCK
Mode0
8CLK
SI
0Bh
Add.
Add.
Add.
X
MSB
N
N+1
N+2
SO
High Impedance
DATA
MSB
DATA
MSB
DATA
MSB
When SCK is input continuously after the read command has been input and the data in the designated addresses has
been output, the address is automatically incremented inside the device while SCK is being input, and the corresponding
data is output in sequence. If the SCK input is continued after the internal address arrives at the highest address
(7FFFFh), the internal address returns to the lowest address (00000h), and data output is continued. By setting the logic
level of CS to high, the device is deselected, and the read cycle ends. While the device is deselected, the output pin SO
is in a high-impedance state.
No.A2096-6/22
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